IISc Pioneers Ultra-Efficient Computing Breakthroughs to Reshape Global Technology Hardware Landscapes

DNI SUMMARY — KEY POINTS

• Researchers at the Indian Institute of Science have developed a groundbreaking memory storage technique using indium selenide that functions with a billion times less energy.
• A separate initiative led by Professor Utsav Banerjee resulted in a 28-nanometre hardware chip specifically engineered to defend IoT devices from future quantum computer threats.
• The team achieved these massive efficiency gains by bypassing traditional melt-quench processes and utilizing innovative circuit designs for post-quantum cryptographic verification methods like SQIsign.
• Experts emphasize that this domestic innovation allows complex AI processing and quantum-safe encryption to transition from massive data centers directly to personal consumer devices.
• Moving forward, the IISc team aims to integrate these advanced memristors and cryptographic chips into mass-market hardware to democratize access to high-performance computing.

Scientists at the Indian Institute of Science have unveiled a dual-front breakthrough in semiconductor research, combining energy-efficient memory storage with advanced quantum-safe cybersecurity measures. By utilizing the unique properties of indium selenide, the team discovered a method to induce phase transitions without the standard, power-hungry thermal cycling typically required for memory operations. This approach fundamentally alters how devices store data by enabling crystalline-to-glass shifts through mechanical shocks. Such a discovery promises to shrink the energy footprint of digital storage systems by a factor of one billion, signaling a massive leap forward for sustainable microelectronics development.

Engineering Next Generation Memory Storage

Engineering Next Generation Memory Storage

Traditional memory devices, ranging from computer RAM to optical discs, rely on a melt-quench process that necessitates extreme heat and rapid cooling to toggle between atomic states. This energy-intensive cycle has long acted as a bottleneck for device performance and power efficiency in modern hardware architectures. The newly developed indium selenide material facilitates a direct transformation, effectively bypassing the liquid phase altogether. By minimizing thermal overhead, this innovation allows for significantly faster data writing speeds while maintaining structural integrity, offering a pathway toward ultra-low-power memory systems that can operate with minimal electrical current.

Defending Infrastructure From Quantum Threats

A separate but equally vital project focuses on the looming risks posed by quantum computation to existing security protocols in the Internet of Things. Recognizing the vulnerability of current encryption to quantum-assisted decryption, researchers at the Department of Electronic Systems Engineering designed a hardware accelerator chip capable of handling sophisticated post-quantum algorithms. This hardware implementation of the SQIsign signature scheme addresses the computational complexity that historically prevented PQC adoption on resource-constrained embedded devices. The integration of advanced circuit innovations ensures that security standards can scale across diverse consumer platforms without sacrificing processing speed or battery life.

Defending Infrastructure From Quantum Threats

Powering The Future Of Distributed Intelligence

The hardware accelerator chip utilizes advanced 28-nanometre CMOS technology to perform complex modular arithmetic and elliptic curve evaluations with unprecedented speed. By optimizing the architecture specifically for isogeny-based digital signatures, the team has successfully demonstrated a tenfold performance improvement over existing software implementations. This achievement provides a critical shield against the harvest-now-decrypt-later tactics employed by sophisticated cyber-attackers. By embedding quantum-resilience directly into the silicon, the researchers have created a viable roadmap for securing global digital infrastructure against future advancements in computational power that threaten standard cryptographic foundations today.

Beyond traditional memory and security, the broader neuromorphic computing initiative at the Bangalore campus seeks to replace the rigid limitations of the Von Neumann architecture. By employing memristors capable of accessing over 16,500 conductance states, the team has created a brain-inspired platform that performs matrix multiplication—the primary engine of modern artificial intelligence—with exceptional efficiency. This radical shift from binary digital logic to multi-state processing allows devices to run sophisticated models locally. The transition from large, resource-heavy data centers to personal laptops and mobile devices marks a significant turning point in the democratization of artificial intelligence hardware.

Securing Sustainable Global Computing Infrastructure

Powering The Future Of Distributed Intelligence

This surge in domestic innovation positions the nation as a formidable competitor in the global semiconductor race, shifting focus toward specialized AI accelerators and hardware-level security. The ability to handle complex algorithmic tasks on personal devices removes the reliance on high-latency cloud connectivity for essential AI operations. As these memristors transition from prototype to industrial application, the potential for decentralized computing grows exponentially. Policymakers and industry leaders are now looking toward the commercialization of these prototypes, ensuring that the next generation of consumer electronics is both faster and inherently safer than previous iterations of technological hardware.